From cb6fa894ef1c59c3146541a0e941756382d7270e Mon Sep 17 00:00:00 2001 From: Lukas Sismis Date: Wed, 21 Sep 2022 16:15:18 +0200 Subject: [PATCH] dpdk: add a check for HW checksum validation offload Ticket: #5553 --- src/decode.h | 2 +- src/runmode-dpdk.c | 2 +- src/source-dpdk.c | 22 ++++++++++++++++++++++ 3 files changed, 24 insertions(+), 2 deletions(-) diff --git a/src/decode.h b/src/decode.h index ca81e3457c..dfa8af0f01 100644 --- a/src/decode.h +++ b/src/decode.h @@ -41,13 +41,13 @@ #include "util-napatech.h" #endif /* HAVE_NAPATECH */ - typedef enum { CHECKSUM_VALIDATION_DISABLE, CHECKSUM_VALIDATION_ENABLE, CHECKSUM_VALIDATION_AUTO, CHECKSUM_VALIDATION_RXONLY, CHECKSUM_VALIDATION_KERNEL, + CHECKSUM_VALIDATION_OFFLOAD, } ChecksumValidationMode; enum PktSrcEnum { diff --git a/src/runmode-dpdk.c b/src/runmode-dpdk.c index 4a317b316c..08923abd64 100644 --- a/src/runmode-dpdk.c +++ b/src/runmode-dpdk.c @@ -1210,7 +1210,7 @@ static int DeviceConfigure(DPDKIfaceConfig *iconf) DeviceInitPortConf(iconf, &dev_info, &port_conf); if (port_conf.rxmode.offloads & DEV_RX_OFFLOAD_CHECKSUM) { // Suricata does not need recalc checksums now - iconf->checksum_mode = CHECKSUM_VALIDATION_DISABLE; + iconf->checksum_mode = CHECKSUM_VALIDATION_OFFLOAD; } retval = rte_eth_dev_configure( diff --git a/src/source-dpdk.c b/src/source-dpdk.c index ee28913003..6bdd3167b8 100644 --- a/src/source-dpdk.c +++ b/src/source-dpdk.c @@ -385,6 +385,28 @@ static TmEcode ReceiveDPDKLoop(ThreadVars *tv, void *data, void *slot) p->dpdk_v.copy_mode = ptv->copy_mode; p->dpdk_v.out_port_id = ptv->out_port_id; p->dpdk_v.out_queue_id = ptv->queue_id; + p->livedev = ptv->livedev; + + if (ptv->checksum_mode == CHECKSUM_VALIDATION_DISABLE) { + p->flags |= PKT_IGNORE_CHECKSUM; + } else if (ptv->checksum_mode == CHECKSUM_VALIDATION_OFFLOAD) { + uint64_t ol_flags = ptv->received_mbufs[i]->ol_flags; + if ((ol_flags & RTE_MBUF_F_RX_IP_CKSUM_MASK) == RTE_MBUF_F_RX_IP_CKSUM_GOOD && + (ol_flags & RTE_MBUF_F_RX_L4_CKSUM_MASK) == RTE_MBUF_F_RX_L4_CKSUM_GOOD) { + SCLogDebug("HW detected GOOD IP and L4 chsum, ignoring validation"); + p->flags |= PKT_IGNORE_CHECKSUM; + } else { + if ((ol_flags & RTE_MBUF_F_RX_IP_CKSUM_MASK) == RTE_MBUF_F_RX_IP_CKSUM_BAD) { + SCLogDebug("HW detected BAD IP checksum"); + // chsum recalc will not be triggered but rule keyword check will be + p->level3_comp_csum = 0; + } + if ((ol_flags & RTE_MBUF_F_RX_L4_CKSUM_MASK) == RTE_MBUF_F_RX_L4_CKSUM_BAD) { + SCLogDebug("HW detected BAD L4 chsum"); + p->level4_comp_csum = 0; + } + } + } PacketSetData(p, rte_pktmbuf_mtod(p->dpdk_v.mbuf, uint8_t *), rte_pktmbuf_pkt_len(p->dpdk_v.mbuf));