16 Commits (aa52dbfeb8e00fb385122cfe1f7a4525e5ca0cde)

Author	SHA1	Message	Date
Connor McLaughlin	aa52dbfeb8	CPU/Recompiler: Use register cache for managing pc ... Reduces the number of loadstores after each instruction.	7 years ago
Connor McLaughlin	002d1cd4fd	CPU/CoreCache: Use virtual (unmasked) address as PC	7 years ago
Connor McLaughlin	eeea5125f7	CPU: Use pending ticks as downcount comparison ... Saves a few cycles decrementing the downcount.	7 years ago
Connor McLaughlin	e518cbfffb	CPU/Recompiler: Fallback-all-instructions working in AArch64	7 years ago
Connor McLaughlin	f11d357ab9	Compile fixes for Android	7 years ago
Connor McLaughlin	519dbc818d	CPU/CodeCache: Fix DMA writes not invalidating code blocks ... Fixes Crash Team Racing and Spyro in Cached Interpreter/Recompiler modes.	7 years ago
Connor McLaughlin	8c5fcc8f48	CPU: Fix more load delay slot issues ... Fixes Spyro again. b{ltz,gez}(al)? disabled in the recompiler until issues are fixed.	7 years ago
Connor McLaughlin	889bd73ac8	CPU: Add settings for execution mode	7 years ago
Connor McLaughlin	b8de55b9b8	CPU/Recompiler: Implement simple block linking	7 years ago
Connor McLaughlin	11966e4caf	CPU/Recompiler: Write exception exits to far code buffer ... Keeps the hot path nice and clean.	7 years ago
Connor McLaughlin	f46160ac46	CPU/Recompiler: Implement mult/multu	7 years ago
Connor McLaughlin	9e82afac7b	CPU/Recompiler: Support block revalidation instead of flushing	7 years ago
Connor McLaughlin	7aafaeacbc	CPU/Recompiler: Implement lb/lbu/lh/lhu/lw/sb/sh/sw instructions ... Currently not passing CPU tests when combined with lwl/lwr.	7 years ago
Connor McLaughlin	9e3bb62216	CPU/CodeCache: Fast path for self-linking blocks	7 years ago
Connor McLaughlin	5217088d82	CPU: Refactor load delay handling ... Now works when mixing interpreter and recompiler code.	7 years ago
Connor McLaughlin	1d6c4a3af1	CPU: Basic recompiler implementation for x64 (lui, ori, addiu) ... Disabled by default.	7 years ago