GPU: Fix typo

src/core/gpu.cpp

@@ -442,22 +442,22 @@ void GPU::UpdateDMARequest()
   {
     case BlitterState::Idle:
       m_GPUSTAT.ready_to_send_vram = false;
-      m_GPUSTAT.ready_to_recieve_dma = (m_fifo.IsEmpty() || m_fifo.GetSize() < m_command_total_words);
+      m_GPUSTAT.ready_to_receive_dma = (m_fifo.IsEmpty() || m_fifo.GetSize() < m_command_total_words);
       break;
 
     case BlitterState::WritingVRAM:
       m_GPUSTAT.ready_to_send_vram = false;
-      m_GPUSTAT.ready_to_recieve_dma = (m_fifo.GetSize() < m_fifo_size);
+      m_GPUSTAT.ready_to_receive_dma = (m_fifo.GetSize() < m_fifo_size);
       break;
 
     case BlitterState::ReadingVRAM:
       m_GPUSTAT.ready_to_send_vram = true;
-      m_GPUSTAT.ready_to_recieve_dma = false;
+      m_GPUSTAT.ready_to_receive_dma = false;
       break;
 
     case BlitterState::DrawingPolyLine:
       m_GPUSTAT.ready_to_send_vram = false;
-      m_GPUSTAT.ready_to_recieve_dma = (m_fifo.GetSize() < m_fifo_size);
+      m_GPUSTAT.ready_to_receive_dma = (m_fifo.GetSize() < m_fifo_size);
       break;
 
     default:
@@ -473,11 +473,11 @@ void GPU::UpdateDMARequest()
       break;
 
     case GPUDMADirection::FIFO:
-      dma_request = m_GPUSTAT.ready_to_recieve_dma;
+      dma_request = m_GPUSTAT.ready_to_receive_dma;
       break;
 
     case GPUDMADirection::CPUtoGP0:
-      dma_request = m_GPUSTAT.ready_to_recieve_dma;
+      dma_request = m_GPUSTAT.ready_to_receive_dma;
       break;
 
     case GPUDMADirection::GPUREADtoCPU:

src/core/gpu_types.h

@@ -205,7 +205,7 @@ union GPUSTAT
   BitField<u32, bool, 25, 1> dma_data_request;
   BitField<u32, bool, 26, 1> gpu_idle;
   BitField<u32, bool, 27, 1> ready_to_send_vram;
-  BitField<u32, bool, 28, 1> ready_to_recieve_dma;
+  BitField<u32, bool, 28, 1> ready_to_receive_dma;
   BitField<u32, GPUDMADirection, 29, 2> dma_direction;
   BitField<u32, bool, 31, 1> display_line_lsb;