diff --git a/src/common/cpu_detect.h b/src/common/cpu_detect.h
index dc100f880..5c3c278d4 100644
--- a/src/common/cpu_detect.h
+++ b/src/common/cpu_detect.h
@@ -8,6 +8,8 @@
 #define CPU_X86 1
 #elif defined(_M_ARM64)
 #define CPU_AARCH64 1
+#elif defined(_M_ARM)
+#define CPU_AARCH32 1
 #else
 #error Unknown architecture.
 #endif
@@ -21,7 +23,7 @@
 #elif defined(__aarch64__)
 #define CPU_AARCH64 1
 #elif defined(__arm__)
-#define CPU_ARM 1
+#define CPU_AARCH32 1
 #else
 #error Unknown architecture.
 #endif
diff --git a/src/common/jit_code_buffer.cpp b/src/common/jit_code_buffer.cpp
index 3866b1284..e1a884b48 100644
--- a/src/common/jit_code_buffer.cpp
+++ b/src/common/jit_code_buffer.cpp
@@ -148,7 +148,7 @@ void JitCodeBuffer::CommitCode(u32 length)
   if (length == 0)
     return;
 
-#if defined(CPU_ARM) || defined(CPU_AARCH64)
+#if defined(CPU_AARCH32) || defined(CPU_AARCH64)
   // ARM instruction and data caches are not coherent, we need to flush after every block.
   FlushInstructionCache(m_free_code_ptr, length);
 #endif
@@ -163,7 +163,7 @@ void JitCodeBuffer::CommitFarCode(u32 length)
   if (length == 0)
     return;
 
-#if defined(CPU_ARM) || defined(CPU_AARCH64)
+#if defined(CPU_AARCH32) || defined(CPU_AARCH64)
   // ARM instruction and data caches are not coherent, we need to flush after every block.
   FlushInstructionCache(m_free_far_code_ptr, length);
 #endif