GPU: Tie idle bit to FIFO emptyness on VRAM write

Fixes Tenga Seiha lockup on boot.
9 months ago · 73136d7dc4
parent 53600746c7
commit 73136d7dc4
1 changed files with 2 additions and 8 deletions
--- a/src/core/gpu.cpp
+++ b/src/core/gpu.cpp
@ -448,19 +448,13 @@ void GPU::UpdateGPUIdle()
  switch (m_blitter_state)
  {
    case BlitterState::Idle:
+    case BlitterState::DrawingPolyLine:
      m_GPUSTAT.gpu_idle = (m_pending_command_ticks <= 0 && m_fifo.IsEmpty());
      break;

    case BlitterState::WritingVRAM:
-      m_GPUSTAT.gpu_idle = false;
-      break;
-
    case BlitterState::ReadingVRAM:
-      m_GPUSTAT.gpu_idle = false;
-      break;
-
-    case BlitterState::DrawingPolyLine:
-      m_GPUSTAT.gpu_idle = false;
+      m_GPUSTAT.gpu_idle = m_fifo.IsEmpty();
      break;

    default: