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@ -28,15 +28,15 @@
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#ifndef VIXL_AARCH32_MACRO_ASSEMBLER_AARCH32_H_
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#define VIXL_AARCH32_MACRO_ASSEMBLER_AARCH32_H_
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#include "code-generation-scopes-vixl.h"
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#include "macro-assembler-interface.h"
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#include "pool-manager-impl.h"
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#include "pool-manager.h"
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#include "utils-vixl.h"
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#include "../code-generation-scopes-vixl.h"
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#include "../macro-assembler-interface.h"
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#include "../pool-manager-impl.h"
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#include "../pool-manager.h"
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#include "../utils-vixl.h"
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#include "aarch32/assembler-aarch32.h"
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#include "aarch32/instructions-aarch32.h"
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#include "aarch32/operands-aarch32.h"
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#include "assembler-aarch32.h"
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#include "instructions-aarch32.h"
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#include "operands-aarch32.h"
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namespace vixl {
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@ -272,20 +272,6 @@ class MacroAssembler : public Assembler, public MacroAssemblerInterface {
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true);
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#else
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USE(allow_macro_instructions_);
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#endif
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}
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explicit MacroAssembler(size_t size, InstructionSet isa = kDefaultISA)
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: Assembler(size, isa),
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available_(r12),
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current_scratch_scope_(NULL),
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pool_manager_(4 /*header_size*/,
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4 /*alignment*/,
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4 /*buffer_alignment*/),
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generate_simulator_code_(VIXL_AARCH32_GENERATE_SIMULATOR_CODE),
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pool_end_(NULL) {
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#ifdef VIXL_DEBUG
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SetAllowMacroInstructions( // NOLINT(clang-analyzer-optin.cplusplus.VirtualCall)
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true);
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#endif
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}
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MacroAssembler(byte* buffer, size_t size, InstructionSet isa = kDefaultISA)
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@ -490,8 +476,7 @@ class MacroAssembler : public Assembler, public MacroAssemblerInterface {
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void EnsureEmitFor(uint32_t size) {
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EnsureEmitPoolsFor(size);
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VIXL_ASSERT(GetBuffer()->HasSpaceFor(size) || GetBuffer()->IsManaged());
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GetBuffer()->EnsureSpaceFor(size);
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VIXL_ASSERT(GetBuffer()->HasSpaceFor(size));
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}
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bool AliasesAvailableScratchRegister(Register reg) {
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